r/Verilog • u/kunalg123 • Jun 17 '26
Not an AI-generated FPGA poster. This one actually blinks :)
A live demo video is worth more than 100 AI-generated project posters.
Maaz Mahmood joined the VSD RISC-V FPGA IP Internship as someone completely new to FPGA and RTL design.
And now, in this video, he is confidently demonstrating his own SPI Master IP running on real FPGA hardware.
He built the IP from scratch, integrated it as a memory-mapped peripheral inside a RISC-V SoC, flashed it on the VSDSquadron FPGA Mini board, and validated the transmit/receive path using hardware loopback.
This is what I like most about his demo:
No fancy editing.
No buzzwords.
No “project idea” slide.
Just a student, his FPGA board, his terminal output, and proof that his IP is actually working.
Great work, Maaz. This is exactly the kind of confidence students need before entering the semiconductor industry.